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12/03/2010 07:35 AM 1
Copyright © 2009-2010 by CML
Opus Card – DDR-2 Interface
Reference Manual
Revision Name Date
0.02 Rick Hoover August 21, 2009
0.03 Rick Hoover – Added support for burst reads and writes September 30, 2009
0.04 Rick Hoover – Made corrections to Bus2IP_RdReq that
match ChipScope traces. Basically Bus2IP_RdReq is
active for only one clock on non-burst reads and is active
one additional clock past the de-assertion of Bus2IP_CS
for burst reads.
October 6, 2009
0.10 Rick Hoover – Added support for burst of eight quad-
words. This is required for DMA accesses. Also added
configuration register for resetting the Ethernet PHY and to
control burst accesses via software.
November 16, 2009
1.00 Rick Hoover – Released December 3, 2010
Copyright © 2009-2010 by Computer Measurement Laboratory, LLC
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Sommario

Pagina 1 - Opus Card – DDR-2 Interface

12/03/2010 07:35 AM 1Copyright © 2009-2010 by CML Opus Card – DDR-2 Interface Reference Manual Revision Name Date 0.02 Rick Hoover August

Pagina 2 - Table of Contents

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 10Copyright © 2009-2010 by CML 2.3.4 Burst Memory Write - Eight 32-bit Words 1

Pagina 3 - 1. Introduction

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 11Copyright © 2009-2010 by CML 2.3.5 Burst Memory Write – Two 64-bit Words 1 2

Pagina 4

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 12Copyright © 2009-2010 by CML 2.3.6 Burst Memory Write - Four 64-bit Words 1 2

Pagina 5

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 13Copyright © 2009-2010 by CML 3. State Machines for Reading Data from Memory This

Pagina 6

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 14Copyright © 2009-2010 by CML 3.2 Read State Machine The read state machine curre

Pagina 7

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 15Copyright © 2009-2010 by CML 3.2 Read FIFO State Machine The Read FIFO state mac

Pagina 8

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 16Copyright © 2009-2010 by CML 3.3 Waveforms 3.3.1 Non-burst, 32-bit Memory Read

Pagina 9

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 17Copyright © 2009-2010 by CML 3.3.2 Non-burst, 32-bit Memory Read not Clock-Alig

Pagina 10

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 18Copyright © 2009-2010 by CML 3.3.3 Non-burst, 64-bit Memory Read The timing diagr

Pagina 11

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 19Copyright © 2009-2010 by CML 3.3.4 Burst Memory Read - Four 32-bit Words The timi

Pagina 12

Opus Card – DDR-2 Interface Reference Manual Table of Contents 12/03/2010 07:35 AM 2Copyright © 2009-2010 by CML 1. INTRODUCTION ...

Pagina 13

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 20Copyright © 2009-2010 by CML 3.3.5 Burst Memory Read - Eight 32-bit Words The tim

Pagina 14

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 21Copyright © 2009-2010 by CML 3.3.6 Burst Memory Read - Two 64-bit Words The timin

Pagina 15

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 22Copyright © 2009-2010 by CML 3.3.7 Burst Memory Read - Four 64-bit Words The timi

Pagina 16

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 3Copyright © 2009-2010 by CML 1. Introduction This document provides the details on

Pagina 17

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 4Copyright © 2009-2010 by CML 1.4 DDR-2 Memory Accessible by the CPU The DDR-2 memo

Pagina 18

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 5Copyright © 2009-2010 by CML 2. State Machine for Writing Data to Memory This chap

Pagina 19

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 6Copyright © 2009-2010 by CML 2.2 Write State Machine The write state machine curr

Pagina 20

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 7Copyright © 2009-2010 by CML 2.3 Waveforms 2.3.1 Non-burst, 32-bit Memory Write

Pagina 21

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 8Copyright © 2009-2010 by CML 2.3.2 Non-burst, 64-bit Memory Write The diagram bel

Pagina 22

Opus Card – DDR-2 Interface Reference Manual 12/03/2010 07:35 AM 9Copyright © 2009-2010 by CML 2.3.3 Burst Memory Write - Four 32-bit Words 1 2

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